Omega-engineering DIGITAL INPUT/OUTPUT PCI-DIO96 Instrukcja Użytkownika Pobierz pdf (Strona 20)

5.4.7 Counter Interrupt Source Configure

BADR3 + 15 hex

READ/WRITE

CTR1CTRIRINTENXXXXX

01234567

INTEN Enables or disabled interrupts. 1 = enabled, 0 = disabled

CTRIR Enables or disables the counters as an interrupt source. 1 = counters may

generate interrupts. 0 = counters cannot generate interrupts.

CTR1 Controls whether counter 2 is the interrupt source, or counter 1 is the

interrupt source. When CTR1 is set to 1, the interrupt source is counter 2

and counter 1 acts as a prescaler for counter 2. When CTR1 is set to 0,

the interrupt source is counter 1. (Counter 3 is not used.)

1 2 ... 15 16 17 18 19 20 21 22 23 24 25 ... 30 31

Brak uwag

Omega-engineering DIGITAL INPUT/OUTPUT PCI-DIO96 Instrukcja Użytkownika Strona 20